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#include "common.h" #include "common.h" |
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#include "SimpleDmaReg.h" #include "SimpleDmaReg.h" |
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#include "SimpleDmaCore.h" #include "SimpleDmaCore.h" |
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template<int CH_NUM = 1> template<int CH_NUM = 1> |
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SC_MODULE( SimpleDma ){ SC_MODULE( SimpleDma ){ |
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sc_in_clk clk; sc_in_clk clk; |
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sc_in<bool> nrst; sc_in<bool> nrst; |
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// register bus // register bus |
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sc_in<sc_uint<32>> RegAddr; sc_in<sc_uint<32>> RegAddr; |
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sc_in<sc_uint<32>> RegWData; sc_in<sc_uint<32>> RegWData; |
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sc_in<bool> RegNce; sc_in<bool> RegNce; |
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sc_in<bool> RegWrite; sc_in<bool> RegWrite; |
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sc_out<sc_uint<32>> RegRData; sc_out<sc_uint<32>> RegRData; |
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// SRAM bus // SRAM bus |
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sc_out<sc_uint<32>> SramAddr; sc_out<sc_uint<32>> SramAddr; |
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sc_out<sc_uint<32>> SramWData; sc_out<sc_uint<32>> SramWData; |
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sc_out<bool> SramNce; sc_out<bool> SramNce; |
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sc_out<bool> SramWrite; sc_out<bool> SramWrite; |
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sc_in<sc_uint<32>> SramRData; sc_in<sc_uint<32>> SramRData; |
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// $ScppAutoMember | // $ScppAutoMember Begin |
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> sc_signal<sc_uint<32>> SrcAddr; |
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> sc_signal<sc_uint<32>> DstAddr; |
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> sc_signal<sc_uint<32>> XferCnt; |
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> sc_signal<bool> Run; |
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> sc_signal<bool> Done; |
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> sc_signal<bool> NceCh[CH_NUM]; |
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> sc_signal<sc_uint<32>> RegRDataCh[CH_NUM]; |
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> sc_signal<sc_uint<32>> SrcAddrCh[CH_NUM]; |
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> sc_signal<sc_uint<32>> DstAddrCh[CH_NUM]; |
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> sc_signal<sc_uint<32>> XferCntCh[CH_NUM]; |
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> sc_signal<bool> RunCh[CH_NUM]; |
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> sc_signal<bool> DoneCh[CH_NUM]; |
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> SimpleDmaCore *u_SimpleDmaCore; |
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> SimpleDmaReg *u_SimpleDmaReg[CH_NUM]; |
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> void AddrDecorder( void ); |
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> void ArbiterSelector( void ); |
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> void RDataSelector( void ); |
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> // $ScppEnd |
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SC_CTOR( SimpleDma ) : SC_CTOR( SimpleDma ) : |
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// $ScppInitializer | // $ScppInitializer Begin |
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> clk( "clk" ), |
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> nrst( "nrst" ), |
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> RegAddr( "RegAddr" ), |
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> RegWData( "RegWData" ), |
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> RegNce( "RegNce" ), |
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> RegWrite( "RegWrite" ), |
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> RegRData( "RegRData" ), |
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> SramAddr( "SramAddr" ), |
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> SramWData( "SramWData" ), |
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> SramNce( "SramNce" ), |
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> SramWrite( "SramWrite" ), |
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> SramRData( "SramRData" ), |
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> SrcAddr( "SrcAddr" ), |
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> DstAddr( "DstAddr" ), |
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> XferCnt( "XferCnt" ), |
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> Run( "Run" ), |
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> Done( "Done" ) |
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> // $ScppEnd |
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{ { |
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// $ScppSensitive( "." ) | // $ScppSensitive( "." ) Begin |
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> SC_METHOD( AddrDecorder ); |
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> sensitive << RegAddr << RegNce; |
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> |
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> SC_METHOD( ArbiterSelector ); |
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> for( int i = 0; i < CH_NUM; ++i ){ |
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> sensitive << DstAddrCh[i] << RunCh[i] << SrcAddrC |
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> } |
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> sensitive << Done; |
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> |
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> SC_METHOD( RDataSelector ); |
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> for( int i = 0; i < CH_NUM; ++i ) sensitive << RegRDa |
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> |
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> // $ScppEnd |
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/* $ScppInstance( /* $ScppInstance( |
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SimpleDmaCore, u_SimpleDmaCore, "SimpleDmaCore.h" SimpleDmaCore, u_SimpleDmaCore, "SimpleDmaCore.h" |
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"@clk|nrst|Sram.*@@", "@clk|nrst|Sram.*@@", |
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"///W", "///W", |
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) */ | ) Begin */ |
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> u_SimpleDmaCore = new SimpleDmaCore( "u_SimpleDmaCore |
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> u_SimpleDmaCore->clk( clk ); |
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> u_SimpleDmaCore->nrst( nrst ); |
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> u_SimpleDmaCore->SrcAddr( SrcAddr ); |
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> u_SimpleDmaCore->DstAddr( DstAddr ); |
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> u_SimpleDmaCore->XferCnt( XferCnt ); |
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> u_SimpleDmaCore->Run( Run ); |
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> u_SimpleDmaCore->Done( Done ); |
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> u_SimpleDmaCore->SramAddr( SramAddr ); |
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> u_SimpleDmaCore->SramWData( SramWData ); |
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> u_SimpleDmaCore->SramNce( SramNce ); |
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> u_SimpleDmaCore->SramWrite( SramWrite ); |
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> u_SimpleDmaCore->SramRData( SramRData ); |
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> // $ScppEnd |
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/* $ScppInstance( /* $ScppInstance( |
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SimpleDmaReg, u_SimpleDmaReg[ CH_NUM ], "SimpleDm SimpleDmaReg, u_SimpleDmaReg[ CH_NUM ], "SimpleDm |
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"/clk|nrst//", "/clk|nrst//", |
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"/(Addr|WData|Write)/Reg$1/", "/(Addr|WData|Write)/Reg$1/", |
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"/(RData)/Reg$1Ch[]/W", "/(RData)/Reg$1Ch[]/W", |
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"//$1Ch[]/W", "//$1Ch[]/W", |
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) */ | ) Begin */ |
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> for( int _i_0 = 0; _i_0 < CH_NUM; ++_i_0 ){ |
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> u_SimpleDmaReg[_i_0] = new SimpleDmaReg(( std::st |
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> u_SimpleDmaReg[_i_0]->clk( clk ); |
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> u_SimpleDmaReg[_i_0]->nrst( nrst ); |
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> u_SimpleDmaReg[_i_0]->Addr( RegAddr ); |
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> u_SimpleDmaReg[_i_0]->WData( RegWData ); |
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> u_SimpleDmaReg[_i_0]->Nce( NceCh[_i_0] ); |
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> u_SimpleDmaReg[_i_0]->Write( RegWrite ); |
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> u_SimpleDmaReg[_i_0]->RData( RegRDataCh[_i_0] ); |
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> u_SimpleDmaReg[_i_0]->SrcAddr( SrcAddrCh[_i_0] ); |
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> u_SimpleDmaReg[_i_0]->DstAddr( DstAddrCh[_i_0] ); |
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> u_SimpleDmaReg[_i_0]->XferCnt( XferCntCh[_i_0] ); |
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> u_SimpleDmaReg[_i_0]->Run( RunCh[_i_0] ); |
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> u_SimpleDmaReg[_i_0]->Done( DoneCh[_i_0] ); |
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> } |
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> // $ScppEnd |
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// $ScppSigTrace | // $ScppSigTrace Begin |
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> #ifdef VCD_WAVE |
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> sc_trace( ScppTraceFile, clk, std::string( this->name |
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> sc_trace( ScppTraceFile, nrst, std::string( this->nam |
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> sc_trace( ScppTraceFile, RegAddr, std::string( this-> |
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> sc_trace( ScppTraceFile, RegWData, std::string( this- |
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> sc_trace( ScppTraceFile, RegNce, std::string( this->n |
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> sc_trace( ScppTraceFile, RegWrite, std::string( this- |
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> sc_trace( ScppTraceFile, RegRData, std::string( this- |
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> sc_trace( ScppTraceFile, SramAddr, std::string( this- |
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> sc_trace( ScppTraceFile, SramWData, std::string( this |
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> sc_trace( ScppTraceFile, SramNce, std::string( this-> |
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> sc_trace( ScppTraceFile, SramWrite, std::string( this |
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> sc_trace( ScppTraceFile, SramRData, std::string( this |
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> sc_trace( ScppTraceFile, SrcAddr, std::string( this-> |
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> sc_trace( ScppTraceFile, DstAddr, std::string( this-> |
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> sc_trace( ScppTraceFile, XferCnt, std::string( this-> |
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> sc_trace( ScppTraceFile, Run, std::string( this->name |
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> sc_trace( ScppTraceFile, Done, std::string( this->nam |
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> #endif // VCD_WAVE |
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> // $ScppEnd |
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} } |
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}; }; |